Fundamentals of Computer-Aided Circuit Simulation

Fundamentals of Computer-Aided Circuit Simulation
Author :
Publisher : Springer Science & Business Media
Total Pages : 184
Release :
ISBN-10 : 9781461320111
ISBN-13 : 1461320119
Rating : 4/5 (11 Downloads)

Book Synopsis Fundamentals of Computer-Aided Circuit Simulation by : William J. McCalla

Download or read book Fundamentals of Computer-Aided Circuit Simulation written by William J. McCalla and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 184 pages. Available in PDF, EPUB and Kindle. Book excerpt: From little more than a circuit-theoretical concept in 1965, computer-aided circuit simulation developed into an essential and routinely used design tool in less than ten years. In 1965 it was costly and time consuming to analyze circuits consisting of a half-dozen transistors. By 1975 circuits composed of hundreds of transistors were analyzed routinely. Today, simulation capabilities easily extend to thousands of transistors. Circuit designers use simulation as routinely as they used to use a slide rule and almost as easily as they now use hand-held calculators. However, just as with the slide rule or hand-held calculator, some designers are found to use circuit simulation more effectively than others. They ask better questions, do fewer analyses, and get better answers. In general, they are more effective in using circuit simulation as a design tool. Why? Certainly, design experience, skill, intuition, and even luck contribute to a designer's effectiveness. At the same time those who design and develop circuit simulation programs would like to believe that their programs are so easy and straightforward to use, so well debugged and so efficient that even their own grandmother could design effectively using their program.

FET Modeling for Circuit Simulation

FET Modeling for Circuit Simulation
Author :
Publisher : Springer Science & Business Media
Total Pages : 192
Release :
ISBN-10 : 9781461316879
ISBN-13 : 1461316871
Rating : 4/5 (79 Downloads)

Book Synopsis FET Modeling for Circuit Simulation by : Dileep A. Divekar

Download or read book FET Modeling for Circuit Simulation written by Dileep A. Divekar and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 192 pages. Available in PDF, EPUB and Kindle. Book excerpt: Circuit simulation is widely used for the design of circuits, both discrete and integrated. Device modeling is an impor tant aspect of circuit simulation since it is the link between the physical device and the sim ulate d device. Curren tly available circuit simulation programs provide a variety of built-in models. Many circuit designers use these built-in models whereas some incorporate new models in the circuit sim ulation programs. Understanding device modeling with particular emphasis on circuit simulation will be helpful in utilizing the built-in models more efficiently as well as in implementing new models. SPICE is used as a vehicle since it is the most widely used circuit sim ulation program. How ever, some issues are addressed which are not directly appli cable to SPICE but are applicable to circuit simulation in general. These discussions are useful for modifying SPICE and for understanding other simulation programs. The gen eric version 2G. 6 is used as a reference for SPICE, although numerous different versions exist with different modifications. This book describes field effect transistor models commonly used in a variety of circuit sim ulation pro grams. Understanding of the basic device physics and some familiarity with device modeling is assumed. Derivation of the model equations is not included. ( SPICE is a circuit sim ulation program available from EECS Industrial Support Office, 461 Cory Hall, University of Cali fornia, Berkeley, CA 94720. ) Acknowledgements I wish to express my gratitude to Valid Logic Systems, Inc.

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits

Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits
Author :
Publisher : Springer Science & Business Media
Total Pages : 690
Release :
ISBN-10 : 9780306470400
ISBN-13 : 0306470403
Rating : 4/5 (00 Downloads)

Book Synopsis Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits by : M. Bushnell

Download or read book Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits written by M. Bushnell and published by Springer Science & Business Media. This book was released on 2006-04-11 with total page 690 pages. Available in PDF, EPUB and Kindle. Book excerpt: The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.

Low-power HF Microelectronics

Low-power HF Microelectronics
Author :
Publisher : IET
Total Pages : 1072
Release :
ISBN-10 : 0852968744
ISBN-13 : 9780852968741
Rating : 4/5 (44 Downloads)

Book Synopsis Low-power HF Microelectronics by : Gerson A. S. Machado

Download or read book Low-power HF Microelectronics written by Gerson A. S. Machado and published by IET. This book was released on 1996 with total page 1072 pages. Available in PDF, EPUB and Kindle. Book excerpt: This book brings together innovative modelling, simulation and design techniques in CMOS, SOI, GaAs and BJT to achieve successful high-yield manufacture for low-power, high-speed and reliable-by-design analogue and mixed-mode integrated systems.

SPICE for Power Electronics and Electric Power

SPICE for Power Electronics and Electric Power
Author :
Publisher : CRC Press
Total Pages : 582
Release :
ISBN-10 : 9781420026429
ISBN-13 : 1420026429
Rating : 4/5 (29 Downloads)

Book Synopsis SPICE for Power Electronics and Electric Power by : Muhammad H. Rashid

Download or read book SPICE for Power Electronics and Electric Power written by Muhammad H. Rashid and published by CRC Press. This book was released on 2005-11-02 with total page 582 pages. Available in PDF, EPUB and Kindle. Book excerpt: To be accredited, a power electronics course should cover a significant amount of design content and include extensive use of computer-aided analysis with simulation tools such as SPICE. Based upon the authors' experience in designing such courses, SPICE for Power Electronics and Electric Power, Second Edition integrates a SPICE simulator with a po

Switch-Level Timing Simulation of MOS VLSI Circuits

Switch-Level Timing Simulation of MOS VLSI Circuits
Author :
Publisher : Springer Science & Business Media
Total Pages : 218
Release :
ISBN-10 : 9781461317098
ISBN-13 : 1461317096
Rating : 4/5 (98 Downloads)

Book Synopsis Switch-Level Timing Simulation of MOS VLSI Circuits by : Vasant B. Rao

Download or read book Switch-Level Timing Simulation of MOS VLSI Circuits written by Vasant B. Rao and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 218 pages. Available in PDF, EPUB and Kindle. Book excerpt: Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.

Hierarchical Modeling for VLSI Circuit Testing

Hierarchical Modeling for VLSI Circuit Testing
Author :
Publisher : Springer Science & Business Media
Total Pages : 168
Release :
ISBN-10 : 9781461315278
ISBN-13 : 1461315271
Rating : 4/5 (78 Downloads)

Book Synopsis Hierarchical Modeling for VLSI Circuit Testing by : Debashis Bhattacharya

Download or read book Hierarchical Modeling for VLSI Circuit Testing written by Debashis Bhattacharya and published by Springer Science & Business Media. This book was released on 2012-12-06 with total page 168 pages. Available in PDF, EPUB and Kindle. Book excerpt: Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.